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Digital Hardware Design Laboratory

 

(Air Conditioned)

Facilities: Digital IC trainer, 20 MHz dual channel CRO with Logic Scope, Microprocessor based IC tester, nearly 40 different types of TTL ICs. For software implementation: IBM P-IV systems with 18" color monitor, VHDL and Verilog simulation software, Modelsim 5.5c,  FPGA/ CPLD Trainer based on Altra, FPGA/ CPLD Trainer based on Xilinx.

 

 

 

 

 

 

 

 

 

 

       
 
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Jaypee University of Engineering and Technology, A-B Road, Raghogarh, Distt. - Guna (M.P.), PIN - 473226, INDIA
 
 
Ph: +91-7544-267310-314, Fax: +91-7544-267011, Email : contact@juet.ac.in